The present invention relates to mixed module simulation, and more particularly to a mixed mode simulation method and apparatus having a function of calculating a current which may fluctuates due to the operation of a digital circuit realized by logic simulation, wherein logic simulation and circuit simulation are integrated with each other.
Simulation for ICs (Integrated Circuits) may be classified into circuit simulation and logic simulation. The circuit simulation, which employs a differential equation or a circuit equation, treats a circuit to be analyzed as an analog circuit and analyzes it to pursue and evaluate detailed electrical operations of a target circuit. The analysis is performed at a variable time step. The logic simulation, also known as event-driven simulation, treats a circuit to be analyzed as a digital circuit and searches for the behavior of the logic operation of the circuit. The logic simulation employs an event-driven method to perform analysis at equal time intervals using a constant unit time (analysis time unit). The unit time here refers to the resolution of analysis in terms of time. Mixed mode simulation, which is a combination of circuit simulation and logic simulation, has been developed for simulating LSIs (Large Scale Integrated Circuits). In the mixed mode simulation, a circuit portion of a circuit subjected to circuit simulation and therefore treated as an analog circuit is referred to as "an analog analyzed circuit portion" ("an analog simulated circuit"), while a circuit portion subjected to logic simulation and therefore treated as a digital circuit is referred to as "a digital analyzed circuit portion" ("a digital simulated circuit"). Synchronization is established between both simulations in order to transfer signals between the analog analyzed circuit portion and the digital analyzed circuit portion.
Examples of documents which describe simulation for verifying the operation of a mixed analog/digital LSI may be JP-A-1-292482 (Fujitsu) and JP-A-2-220144 (Ricoh). JP-A-1-292482 divides a mixed analog/digital circuit into blocks and executes simulation in accordance with each of the divided circuits for the purpose of minimizing overhead for interfacing the analog portion and the digital portion. JP-A-2-220144 enables simulation to be collectively executed for both of an analog circuit and a digital circuit which are connected with each other. JP-A-2-220144 further aims at reducing a processing time required for simulation of a digital analyzed circuit portion in a mixed digital/analog circuit by getting rid of simulation at transistor level for designated blocks. Further, "Design of VLSI I (Circuit and Layout)", Iwanami Lecture Microelectronics Vol. 3 published by Kabushiki Kaisha Iwanami Shoten on Sep. 22, 1987, Section 3, and "Principles PLE of CMOS VLSI Design a System Perspective" P255--refer to simulation for electronic circuit (analog simulation). Also, Information Processing Series No. 5 entitled "CAD for Logic Devices" published by Institute of Information Processing of Japan, Section 2 refers to simulation for logic gates. Acuna et al "Simulation Techniques for Mixed Analog/Digital Circuits", IEEE Journal of Solid-State Circuits, Vol. 25, No. 2, April, 1990, pp. 353-362 describes techniques used in a simulator called iSPLICE3 for analysis of mixed analog/digital circuits which combines circuit, switch-level timing, and logic simulation models using event-driven selective-trace techniques.
Conventionally, as to simulation for mixed analog/digital LSIs, consideration has been made to a voltage level of signals transferred between an analog analyzed circuit and a digital analyzed circuit. However, a current consumed by the digital analyzed circuit has not been considered or such consideration has been regarded as being unnecessary.
Nevertheless, as a result of an investigation on a current consumed by a digital analyzed circuit, which has been made by the present inventors, from the fact that a power supply line is commonly used by a digital analyzed circuit and an analog analyzed circuit in a mixed analog/digital LSI and a resistance of the power supply line is not zero, it is predicted with high possibility that fluctuation in a current consumed by a digital analyzed circuit affects an analog analyzed circuit. It has therefore been found that, with a conventional simulation method which does not consider a current consumed by a digital analyzed circuit, the total operation characteristics of a digital analyzed circuit and an analog analyzed circuit cannot be simulated in a high accuracy. Incidentally, a logic simulator may be additionally provided with a current calculation function. However, even with such an extended function, as long as the calculation is made only for a digital analyzed circuit, it is apparent that the total characteristics of a digital analyzed circuit and an analog analyzed circuit cannot be simulated.